Use this semiconductor calculation for first-order device, material, fabrication, interconnect, packaging, or reliability estimates when every coefficient and unit convention is known.

Keep-out ratio

Optional number. Ratio of the keep-out radius to the TSV pitch. Must be at least 0; 0 yields 0 µm keep-out.

TSV pitch (µm)

Required number in µm. Center-to-center TSV pitch. Must be greater than 0 µm.

The cited overview of Integrated circuit packaging supplies background for the terminology and domain context used by this tool.^[1]

Compute the placement keep-out zone around a through-silicon via from its pitch and a keep-out ratio. Keep-out = pitch × ratio. Inputs are interpreted exactly in the displayed units and the calculation returns the following fields without presentation rounding.

Keep-out zone (µm)

Returned number in µm. Placement keep-out zone, at least 0 µm.

• Material composition, geometry, process history, temperature, electric field, bias, interfaces, parasitics, and fitted parameter ranges can invalidate a compact semiconductor model.
• Keep-out ratio must be at least 0.
• TSV pitch must be at least 5e-324.
• Use finite inputs in the displayed units, preserve source measurements and assumptions, and independently verify consequential decisions.

Compare the estimate with measured process data, current device documentation, and a higher-fidelity circuit, field, thermal, quantum, or TCAD model when the decision requires it.

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