Use this electronics calculation for a first-pass component, converter, signal, motor, or sensor estimate when the stated operating conditions and units match the device data.

Pixel clock (MHz)

Required number input.

Channel bit depth (bit)

Required integer input.

Estimate legacy HDMI TMDS serial bit rate per data lane from pixel clock and channel bit depth; HDMI 2.1 FRL uses a different link model. The tool evaluates the supplied inputs together and returns the named outputs below; it does not infer omitted operating conditions or change the units shown.^[1]

TMDS rate per lane (Gb/s)

The resulting tmds rate per lane returned as a number.

• Compact electronics formulas omit some combination of tolerances, temperature drift, bandwidth, loading, parasitics, noise spectrum, nonlinearity, clipping, calibration, layout, and device-specific limits. Typical datasheet values are not guaranteed limits.
• Use finite inputs in the displayed units and preserve more precision than the final presentation requires. Independently verify safety-critical, financial, compliance, or production decisions.

Check the result against the current datasheet and worst-case operating corners, then verify the circuit or measurement with simulation and bench testing where failure matters.

• MIPI Lane Rate

  Calculate required per-lane serial rate from aggregate payload rate, active lane count, and specified usable payload efficiency.

• Video Frame Rate

  Frame rate from pixel clock, total pixels per line and total lines per frame, including blanking.

• Video Line Frequency

  Horizontal line rate from pixel clock and total pixels per line, including horizontal blanking.