CAN Bit Timing Calculator
Calculate nominal CAN bitrate and sample point from effective prescaler and segment lengths, including the one-quantum synchronization segment.
Description
CAN nominal bit time consists of one synchronization quantum and two timing segments.
CAN nominal bit time consists of one synchronization quantum and two timing segments. Effective prescaler and segment lengths differ from register values that may encode one less.1, 2
Calculate nominal CAN bitrate and sample point from effective prescaler and segment lengths, including the one-quantum synchronization segment.
When to use CAN Bit Timing Calculator
Use this tool to calculate nominal CAN bitrate and sample point from effective prescaler and segment lengths, including the one-quantum synchronization segment.
Prepare the single firmware record, sampled digital states or effective timing/register parameters requested. Confirm byte order, bit numbering, units and device-specific limits before interpreting the calculation.
How to use CAN Bit Timing Calculator and understand its results
- Prepare the single firmware record, sampled digital states or effective timing/register parameters requested. Confirm byte order, bit numbering, units and device-specific limits before interpreting the calculation.
- Enter clockHz, prescaler, segment1, segment2 using the field table and calculation rules, then run the tool.
- Read bitrate, samplePointPercent, quantumSeconds. The explanation below defines the units, signs, ordering and any flags or placeholder values.
- If the tool reports an input issue, correct the values and run it again. Apply the stated assumptions when interpreting a successfully returned result.
| Input field | Meaning | Value type; see rules below | Requirement |
|---|---|---|---|
| clockHz | CAN controller clock frequency. (Hz) | number; strictly above: 0 | Required |
| prescaler | Effective clock divisor, not an encoded register value. | integer; minimum: 1; maximum: 65536 | Required |
| segment1 | Quanta before the sample point excluding synchronization. | integer; minimum: 1; maximum: 65536 | Required |
| segment2 | Quanta after the sample point. | integer; minimum: 1; maximum: 65536 | Required |
Enter positive clock frequency and positive integer effective prescaler/segments. Return nominal bitrate, sample-point percentage and quantum duration in seconds. Include synchronization only through the built-in one-quantum term.
quanta=1+segment1+segment2; bitrate=clock/(prescaler×quanta); samplePoint%=100(1+segment1)/quanta Units, indexing, boundary conditions and exceptional cases are defined in the calculation rules above.
| Output field | Meaning | Value type |
|---|---|---|
| bitrate | Nominal bit rate. (bit/s) | number; strictly above: 0 |
| samplePointPercent | Sample point as a percentage of the bit time. (%) | number; minimum: 0; maximum: 100 |
| quantumSeconds | Time quantum duration. (s) | number; strictly above: 0 |
{
"input": {
"clockHz": 8000000,
"prescaler": 1,
"segment1": 11,
"segment2": 4
},
"output": {
"bitrate": 500000,
"samplePointPercent": 75,
"quantumSeconds": 1.25e-7
}
}Limitations and assumptions
No controller-specific segment limits, synchronization jump width, bus propagation or CAN-FD data-phase timing is evaluated.
Numeric inputs must be finite. Follow the calculation-specific rules for overflow, underflow and exceptional cases. Missing required fields, extra fields, wrong value types and violations of the calculation rules are input errors.
Alternative or Complementary methods
Use Integer Clock Divider Finder: Find the bounded positive integer divisor minimizing absolute frequency error, selecting the smaller divisor on a tie. For a complementary task, use Register Field Encoder: Replace an unsigned 32-bit register field using exact integer bit operations and explicit field bounds.
Further background: MCAN nominal bit timing.
References
-
CAN Bit Timing Calculator — tool.io
-
MCAN nominal bit timing — Texas Instruments
Similar or alternative tools
- Integer Clock Divider Finder
Find the bounded positive integer divisor minimizing absolute frequency error, selecting the smaller divisor on a tie.
- Register Field Encoder
Replace an unsigned 32-bit register field using exact integer bit operations and explicit field bounds.