NOR-Only Equivalent Circuit Feasibility Checker
Bounded NOR gate counts for standard NOT/AND/OR templates with tied inputs and unlimited fanout; logical universality not circuit timing/power feasibility.
Description
NOR-Only Equivalent Circuit Feasibility Checker: look up a supported built-in reference entry.
NOR is a functionally complete Boolean gate: combinations can represent other basic Boolean operations. The count depends on the chosen construction.
This tool returns a built-in reference entry for an exact supported selector. The supported entries and their scope are part of the tool; no website or current external table is queried.
When to use this tool
Use this tool when the supplied inputs match the specific operation described above and you need a repeatable result under its stated convention.
- Check the supported input and output contract against an existing calculation or observation.
- Use the complete example to confirm units, selector spelling and result interpretation.
How to use the tool and how it works
- Enter every field in the input table using the stated units and the exact supported selector spelling where applicable.
- Run the tool. Correct input errors before interpreting an output.
- Read the result fields below; use accompanying flags and the stated sign, boundary or model convention when interpreting a number.
Look up NOT, AND or OR in the built-in NOR construction table, returning 1, 3 or 2 gates respectively.1
| Input field | Meaning and units | Accepted input |
|---|---|---|
| primitive | Primitive. | Exact value: "NOT", "AND", "OR" |
| primitive | Built-in entry |
|---|---|
| "NOT" | 1 |
| "AND" | 3 |
| "OR" | 2 |
| Output field | Interpretation |
|---|---|
| result | Object containing the following named result fields. |
| result.reference | The stored entry for the exact selected key; its type may be text, a number or a list. |
{
"input": {
"primitive": "NOT"
},
"output": {
"result": {
"reference": 1
}
}
} Limitations and assumptions
- These are construction counts for the supplied table, not a general gate-minimization proof or circuit simulation.
- Every declared field is required and unexpected fields are rejected. Numeric inputs must be finite; input errors are distinct from a valid false result or an explicitly qualified output.
- Extremely large inputs and nonfinite or excessively large outputs are rejected. List positions reported by the tool use zero-based indices unless stated otherwise.
Alternative or Complementary methods
Check the underlying observations, units and conventions independently before using the result in a larger workflow. The tools listed below address nearby tasks; compare their inputs and scope before substituting one for this operation.
References
Similar or alternative tools
- NAND-Only Equivalent Circuit Feasibility Checker
Bounded NAND gate counts for standard NOT/AND/OR templates with tied inputs and unlimited fanout; logical universality not circuit timing/power feasibility.
- a proposition classifier
Categorical propositions use A for universal affirmative, E for universal negative, I for particular affirmative and O for particular negative.