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Electricity: Phasor Leading Lagging Label Tool

Label current phase relative to voltage under a signed phasor convention normalized to [-180,180); not power-factor or instrument calibration.

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Description

Wrap currentPhaseDegrees-voltagePhaseDegrees into [-180,180).

Sinusoidal electrical calculations need a common frequency, phase reference and RMS or peak convention. Phasor sums, complex power and composite RMS describe different operations; a sign label alone does not establish a physical connection or waveform.

Wrap currentPhaseDegrees-voltagePhaseDegrees into [-180,180).

When to use this tool

Use Electricity: Phasor Leading Lagging Label when checking a stated phasor, power or RMS convention.

How to use the tool and how it works

  1. Enter currentPhaseDegrees, voltagePhaseDegrees. Use the units and conventions below.
  2. Run the tool. Correct any format, range, or cross-field input error before interpreting the output.
  3. Read result. Expand result to inspect the returned fields.

Require current and voltage phase degrees in [-360,360]. Wrap currentPhaseDegrees-voltagePhaseDegrees into [-180,180). Label zero in-phase, absolute 180 opposed, positive current-leading and negative current-lagging.1

Input fieldMeaning and unitsAccepted input
currentPhaseDegreesCurrent Phase Degrees Unit: deg.Required. Finite number.
voltagePhaseDegreesVoltage Phase Degrees Unit: deg.Required. Finite number.
Output fieldInterpretationReturned shape
resultObject containing the named calculated members below.Required. Object.
result.relativePhaseDegreesRelative Phase DegreesCalculated result member: number.
result.labelLabelCalculated result member: string.
json
{
  "input": {
    "currentPhaseDegrees": 30,
    "voltagePhaseDegrees": 0
  },
  "output": {
    "result": {
      "relativePhaseDegrees": 30,
      "label": "current-leading"
    }
  }
}

Limitations and assumptions

  • The exact half-cycle tie becomes -180. No tolerance or waveform analysis is added, and physical leading/lagging interpretation requires consistent phase and time-sign conventions.
  • Outputs are nested inside result. Inputs must satisfy both the field types and the cross-field conditions above. Invalid input causes an error; a successful false flag or documented placeholder is a different result.
  • Numeric calculations use binary floating point unless exact decimal-integer arithmetic is explicitly stated. No hidden measurement tolerance or decimal rounding is added; nonfinite or out-of-contract results are rejected. Numeric signed-zero results are exported as zero.

Alternative or Complementary methods

Use compatible measured waveforms and a complete circuit or harmonic model when signals are distorted, references differ or practical limits matter.

References

  1. Calculation and input contract: electricity/phasor-leading-lagging-label — tool.io

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